Senior Layout Engineer - Cadence/ Synopsys

Roles and Responsibilities

• Responsible for planning out full chip floor plan and layout
• Perform custom layout designs to meet schedules.

Requirements:

• Bachelor of Science in Electrical Engineering or equivalent and possess minimum 6 years’ custom layout design experience; Diploma Holders should have more than 8 years experience
• Highly proficient in modern EDA layout tools
• Be able to work closely with IC Design engineers to work on placement of critical blocks
• Experience at least 2 cycles of full chip custom layout till tapeout
• A good team player with good communication skills
• Enthusiastic and independent worker